Workload-Aware Optimal Power Allocation on Single-Chip Heterogeneous Processors

Jae Young Jang, Hao Wang, Euijin Kwon, Jae W. Lee, Nam Sung Kim

Research output: Contribution to journalArticlepeer-review

Abstract

As technology scales below 32 nm, manufacturers began to integrate both CPU and GPU cores in a single chip, i.e., single-chip heterogeneous processor (SCHP), to improve the throughput of emerging applications. In SCHPs, the CPU and the GPU share the total chip power budget while satisfying their own power constraints, respectively. Consequently, to maximize the overall throughput and/or power efficiency, both power budget and workload should be judiciously allocated to the CPU and the GPU. In this paper, we first demonstrate that optimal allocation of power budget and workload to the CPU and the GPU can provide 13 percent higher throughput than the optimal allocation of workload alone for a single-program workload scenario. Second, we also demonstrate that asymmetric power allocation considering per-program characteristics for a multi-programmed workload scenario can provide 9 percent higher throughput or 24 percent higher power efficiency than the even power allocation per program depending on the optimization objective. Last, we propose effective runtime algorithms that can determine near-optimal or optimal combinations of workload and power budget partitioning for both single- and multi-programmed workload scenarios; the runtime algorithms can achieve 96 and 99 percent of the maximum achievable throughput within 5-8 and 3-5 kernel invocations for single- and multi-programmed workload cases, respectively.

Original languageEnglish (US)
Article number7152947
Pages (from-to)1838-1851
Number of pages14
JournalIEEE Transactions on Parallel and Distributed Systems
Volume27
Issue number6
DOIs
StatePublished - Jun 1 2016
Externally publishedYes

Keywords

  • GPU
  • Single-chip heterogeneous processor
  • dynamic voltage and frequency scaling
  • multicores
  • runtime system

ASJC Scopus subject areas

  • Signal Processing
  • Hardware and Architecture
  • Computational Theory and Mathematics

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