WAYPOINT: Scaling coherence to thousand-core architectures

John H. Kelm, Matthew R. Johnson, Steven S. Lumettta, Sanjay J. Patel

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, we evaluate a set of coherence architectures in the context of a 1024-core chip multiprocessor (CMP) tailored to throughput-oriented parallel workloads. Based on our analysis, we develop and evaluate two techniques for scaling coherence to thousand-core CMPs. We find that a broadcast-based probe filtering scheme provides reasonable performance up to 128 cores for some benchmarks, but is not generally scalable. We propose a broadcast-collective network for accelerating probe filter misses, which extends scalability but falls short of supporting 1024 cores. We find that a sparse directory with an invalidate-on-evict policy can work well for many throughput-oriented workloads. However, the on-die structures required to achieve good performance carry a large performance and power overhead. To achieve thousand-core scalability with smaller and less associative sparse directories, we introduce WayPoint, a mechanism that increases directory associativity and capacity dynamically. Using less than 3% of total die area, Way-Point achieves performance within 4% of an infinitely large on-die directory.

Original languageEnglish (US)
Title of host publicationPACT'10 - Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages99-109
Number of pages11
ISBN (Print)9781450301787
DOIs
StatePublished - Jan 1 2010

Publication series

NameParallel Architectures and Compilation Techniques - Conference Proceedings, PACT
Volume2010
ISSN (Print)1089-795X

Keywords

  • accelerator architecture
  • cache coherence
  • probe filtering

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture

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