Voltage-in-Current Latency Insertion Method for Diodes and MOSFETs

Wei Chun Chin; Andrei Pashkovich; Kostas Malinauskas; Jose E. Schutt-Aine; Haidi Ibrahim; Nur Syazreen Ahmad; Patrick Goh

doi:10.1109/TCPMT.2020.3021413

Voltage-in-Current Latency Insertion Method for Diodes and MOSFETs

Wei Chun Chin, Andrei Pashkovich, Kostas Malinauskas, Jose E. Schutt-Aine, Haidi Ibrahim, Nur Syazreen Ahmad, Patrick Goh

Research output: Contribution to journal › Article › peer-review

Abstract

This article presents the improved formulations for the latency insertion method (LIM) for diodes and MOSFETs utilizing the voltage-in-current framework. LIM is a fast circuit simulation algorithm, which computes the solutions to the voltages and currents in a circuit in a leapfrog manner, instead of a simultaneous matrix solution typically performed in the modified nodal analysis formalism. This allows LIM to have a far superior scaling with respect to the dimensions of the circuit. The formulations presented here have the advantage of not being limited by the stability condition in LIM and thus allow the simulations to be performed at larger time steps. Numerical examples are presented, which illustrate the improved performances of the developed formulations.

Original language	English (US)
Article number	9186102
Pages (from-to)	1708-1720
Number of pages	13
Journal	IEEE Transactions on Components, Packaging and Manufacturing Technology
Volume	10
Issue number	10
DOIs	https://doi.org/10.1109/TCPMT.2020.3021413
State	Published - Oct 2020

Keywords

Circuit analysis
latency insertion method (LIM)
nonlinear

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Industrial and Manufacturing Engineering
Electrical and Electronic Engineering

Online availability

10.1109/TCPMT.2020.3021413

Library availability

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Cite this

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title = "Voltage-in-Current Latency Insertion Method for Diodes and MOSFETs",

abstract = "This article presents the improved formulations for the latency insertion method (LIM) for diodes and MOSFETs utilizing the voltage-in-current framework. LIM is a fast circuit simulation algorithm, which computes the solutions to the voltages and currents in a circuit in a leapfrog manner, instead of a simultaneous matrix solution typically performed in the modified nodal analysis formalism. This allows LIM to have a far superior scaling with respect to the dimensions of the circuit. The formulations presented here have the advantage of not being limited by the stability condition in LIM and thus allow the simulations to be performed at larger time steps. Numerical examples are presented, which illustrate the improved performances of the developed formulations. ",

keywords = "Circuit analysis, latency insertion method (LIM), nonlinear",

author = "Chin, {Wei Chun} and Andrei Pashkovich and Kostas Malinauskas and Schutt-Aine, {Jose E.} and Haidi Ibrahim and Ahmad, {Nur Syazreen} and Patrick Goh",

note = "Funding Information: Manuscript received March 17, 2020; revised July 27, 2020; accepted August 21, 2020. Date of publication September 3, 2020; date of current version October 5, 2020. This work was supported in part by Silvaco, Inc., in part by the U.S. Army Small Business Innovation Research (SBIR) Program Office, and in part by the U.S. Army Research Office under Contract W911NF-16-C-0125. Recommended for publication by Associate Editor M. Nakhla upon evaluation of reviewers{\textquoteright} comments. (Corresponding author: Patrick Goh.) Wei Chun Chin, Haidi Ibrahim, Nur Syazreen Ahmad, and Patrick Goh are with the School of Electrical and Electronic Engineering, Universiti Sains Malaysia, Nibong Tebal 14300, Malaysia (e-mail: eepatrick@usm.my). Andrei Pashkovich is with Silvaco, Inc., Santa Clara, CA 95054 USA. Kostas Malinauskas is with Silvaco, Inc., 125047 Moscow, Russia. Publisher Copyright: {\textcopyright} 2011-2012 IEEE.",

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N1 - Funding Information: Manuscript received March 17, 2020; revised July 27, 2020; accepted August 21, 2020. Date of publication September 3, 2020; date of current version October 5, 2020. This work was supported in part by Silvaco, Inc., in part by the U.S. Army Small Business Innovation Research (SBIR) Program Office, and in part by the U.S. Army Research Office under Contract W911NF-16-C-0125. Recommended for publication by Associate Editor M. Nakhla upon evaluation of reviewers’ comments. (Corresponding author: Patrick Goh.) Wei Chun Chin, Haidi Ibrahim, Nur Syazreen Ahmad, and Patrick Goh are with the School of Electrical and Electronic Engineering, Universiti Sains Malaysia, Nibong Tebal 14300, Malaysia (e-mail: eepatrick@usm.my). Andrei Pashkovich is with Silvaco, Inc., Santa Clara, CA 95054 USA. Kostas Malinauskas is with Silvaco, Inc., 125047 Moscow, Russia. Publisher Copyright: © 2011-2012 IEEE.

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AB - This article presents the improved formulations for the latency insertion method (LIM) for diodes and MOSFETs utilizing the voltage-in-current framework. LIM is a fast circuit simulation algorithm, which computes the solutions to the voltages and currents in a circuit in a leapfrog manner, instead of a simultaneous matrix solution typically performed in the modified nodal analysis formalism. This allows LIM to have a far superior scaling with respect to the dimensions of the circuit. The formulations presented here have the advantage of not being limited by the stability condition in LIM and thus allow the simulations to be performed at larger time steps. Numerical examples are presented, which illustrate the improved performances of the developed formulations.

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Voltage-in-Current Latency Insertion Method for Diodes and MOSFETs

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