VLSI architectures for soft-decision decoding of Reed - Solomon codes

Keyphrases

• Reed-Solomon Codes 100%
• VLSI Architecture 100%
• Soft-decision Decoding 100%
• Algorithmic Transformation 100%
• Interpolation Polynomial 50%
• Polynomial Interpolation 50%
• Latency 50%
• Sharing Computation 50%
• Area-efficient 50%
• Decoding Algorithm 50%
• Coding Gain 50%
• Soft Decoding 50%
• Minimum Distance Decoding 50%
• Reed-Solomon 50%
• Efficient Architecture 50%
• Polynomial Factorization 50%
• Soft Decoder 50%

Engineering

• Reed-Solomon Code 100%
• Main Step 50%
• Decoding Algorithm 50%
• Coding Gain 50%

Computer Science

• Very large-scale integration (VLSI) architecture 100%
• soft decision decoding 100%
• Decoding Algorithm 50%