The track-and-hold amplifier (THA) is a key sub-circuit in a data acquisition and conversion system. The input buffer of the THA employs an open-loop linearization technique to reduce distortion and increase bandwidth. The hold mode feedthrough is reduced by the replica switch technique. The parasitic capacitance compensation technique is employed to further improve the signal bandwidth of the THA. Simulation results indicate that the parasitic capacitance compensation technique improves the bandwidth approximately factor of 5. The THA circuit was designed using a 60 GHz fT InGaP/GaAs HBT process. Simulation results are 83 dB spurious-free dynamic range (SFDR) at 100 MHz sampling frequency, 65 dB SFDR at 1 GHz sampling frequency, and 60 dB SFDR at 2 GHz sampling frequency under all Nyquist conditions.
|Original language||English (US)|
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|State||Published - Jan 1 2000|
|Event||Proceedings of the IEEE 2000 Internaitonal Symposium on Circuits and Systems - Geneva, Switz|
Duration: May 28 2000 → May 31 2000
ASJC Scopus subject areas
- Electrical and Electronic Engineering