Very high-speed Reed-Solomon decoders

D. V. Sarwate, N. R. Shanbhag

Research output: Contribution to journalConference article

Abstract

A pipelined finite-field multiplier structure in conjunction with a single systolic array implementation of the Berlekamp-Massey algorithm leads to a highly parallel decoder architecture in which the critical path delay is an order of magnitude smaller than the path delays of conventional architectures.

Original languageEnglish (US)
Number of pages1
JournalIEEE International Symposium on Information Theory - Proceedings
StatePublished - Dec 1 2000
Event2000 IEEE International Symposium on Information Theory - Serrento, Italy
Duration: Jun 25 2000Jun 30 2000

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ASJC Scopus subject areas

  • Theoretical Computer Science
  • Information Systems
  • Modeling and Simulation
  • Applied Mathematics

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