Velocity saturation current-mode CMOS imaging sensor

Raphael Njuguna; Viktor Gruev

doi:10.1109/ISCAS.2013.6572418

Velocity saturation current-mode CMOS imaging sensor

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A current-mode CMOS imaging sensor is presented in this paper. The read-out transistor in the photo pixel operates in velocity saturation regime and allows for high linearity between integrated photo charges and output drain current. The column parallel read-out circuitry implements a novel current conveyor with a feedback mechanism which improves matching of the output currents across the imaging array. Correlated double sampling (CDS) is performed on-chip in order to improve noise characteristics of the imager. A prototype of the proposed imaging sensor was fabricated in 0.18μm triple well CMOS process. The sensor operation and measurements are presented.

Original language	English (US)
Title of host publication	2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
Pages	2630-2633
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2013.6572418
State	Published - Sep 9 2013
Externally published	Yes
Event	2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013 - Beijing, China Duration: May 19 2013 → May 23 2013

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Other

Other	2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013
Country/Territory	China
City	Beijing
Period	5/19/13 → 5/23/13

ASJC Scopus subject areas

Electrical and Electronic Engineering

Online availability

10.1109/ISCAS.2013.6572418

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Njuguna, R & Gruev, V 2013, Velocity saturation current-mode CMOS imaging sensor. in 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013., 6572418, Proceedings - IEEE International Symposium on Circuits and Systems, pp. 2630-2633, 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013, Beijing, China, 5/19/13. https://doi.org/10.1109/ISCAS.2013.6572418

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AB - A current-mode CMOS imaging sensor is presented in this paper. The read-out transistor in the photo pixel operates in velocity saturation regime and allows for high linearity between integrated photo charges and output drain current. The column parallel read-out circuitry implements a novel current conveyor with a feedback mechanism which improves matching of the output currents across the imaging array. Correlated double sampling (CDS) is performed on-chip in order to improve noise characteristics of the imager. A prototype of the proposed imaging sensor was fabricated in 0.18μm triple well CMOS process. The sensor operation and measurements are presented.

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Velocity saturation current-mode CMOS imaging sensor

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