@inproceedings{fcc0012401c54d0f81753dd0f882b61d,
title = "Variation-tolerant motion estimation architecture",
abstract = "In this paper, we study the trade-off between energy-efficiency and variation-tolerance of an error-resilient motion estimation architecture. Error-resiliency is incorporated via algorithmic noise-tolerance (ANT) where an input subsampled replica (ISR) of the main sum-of-absolute-difference (MSAD) block is employed for detecting and correcting errors in the MSAD block. This architecture is referred to as ISR-ANT. In the presence of process variations, the average peak signal-to-noise ratio (PSNR) of ISR-ANT architecture increases by up to 1.8dB over that of the conventional architecture in 130nm IBM process technology. Furthermore, the PSNR variation is also reduced by 7× over that of the conventional architecture at the slow corner while achieving a power reduction of 33%.",
keywords = "Error resiliency, Process variation",
author = "Varatkar, {Girish V.} and Shanbhag, {Naresh R.}",
year = "2007",
doi = "10.1109/SIPS.2007.4387531",
language = "English (US)",
isbn = "1424412226",
series = "IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation",
pages = "126--131",
booktitle = "2007 IEEE Workshop on Signal Processing Systems, SiPS 2007, Proceedings",
note = "2007 IEEE Workshop on Signal Processing Systems, SiPS 2007 ; Conference date: 17-10-2007 Through 19-10-2007",
}