Variation-tolerant architectures for convolutional neural networks in the near threshold voltage regime

Yingyan Lin, Sai Zhang, Naresh R. Shanbhag

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Convolutional neural networks (CNNs) have gained considerable interest due to their state-of-the-art performance in many recognition tasks. However, the computational complexity of CNNs hinders their application on power-constrained embedded platforms. In this paper, we propose a variation-tolerant architecture for CNN capable of operating in near threshold voltage (NTV) regime for energy efficiency. A statistical error compensation (SEC) technique referred to as rank decomposed SEC (RD-SEC) is proposed. RD-SEC is applied to the CNN architecture in NTV in order to correct timing errors that can occur due to process variations. Simulation results in 45nm CMOS show that the proposed architecture can achieve a median detection accuracy Pdet ≥ 0.9 in the presence of gate level delay variation of up to 34%. This represents an 11× improvement in variation tolerance in comparison to a conventional CNN. We further show that RD-SEC-based CNN enables up to 113× reduction in the standard deviation of Pdet compared with the conventional CNN.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International Workshop on Signal Processing Systems, SiPS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages17-22
Number of pages6
ISBN (Electronic)9781509033614
DOIs
StatePublished - Dec 9 2016
Event2016 IEEE International Workshop on Signal Processing Systems, SiPS 2016 - Dallas, United States
Duration: Oct 26 2016Oct 28 2016

Publication series

NameIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
ISSN (Print)1520-6130

Other

Other2016 IEEE International Workshop on Signal Processing Systems, SiPS 2016
CountryUnited States
CityDallas
Period10/26/1610/28/16

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Signal Processing
  • Applied Mathematics
  • Hardware and Architecture

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