Using PLAs to design universal logic modules in FPGAs

K. K. Lee, D. F. Wong

Research output: Contribution to journalConference articlepeer-review

Abstract

We consider implementing Universal Logic Modules in Field Programmable Gate Arrays (FPGAs) with Programmable Logic Arrays (PLAs) using a reduced number of programmable switches. These have the advantages of a regular structure and are very easy to program. By suitably reducing the number of switches in a PLA, the total number of switches is reduced tremendously, while the PLA still remains functionally complete. Since switch features take up more space than other logic elements, the savings can translate to a reduction in area. The reduction in programmable switches implies that a smaller number of programming bits is required for each ULM. We obtained 3-input and 4-input ULMs using 5 and 13 programmable switches respectively, matching previous results but in a smaller area. Technology mapping is also very simple. We also obtain approximate ULMs with very high coverage. We obtained an approximate ULM using 11 programming switches which covers 99% of all 4-input functions, using a much smaller area than [1].

Original languageEnglish (US)
Pages (from-to)421-425
Number of pages5
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume6
StatePublished - Jan 1 1998
Externally publishedYes
EventProceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6) - Monterey, CA, USA
Duration: May 31 1998Jun 3 1998

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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