Understanding transient latchup hazards and the impact of guard rings

Farzan Farbiz, Elyse Rosenbaum

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An experimental study of transient latchup is conducted. Measurements are performed on test structures fabricated in 90-nm and 130-nm CMOS technologies. The worst case testing conditions differ for static and transient latchup. Device simulation is used to understand the measurement results. P-well and N-well guard rings are evaluated under transient test conditions.

Original languageEnglish (US)
Title of host publication2010 IEEE International Reliability Physics Symposium, IRPS 2010
Pages466-473
Number of pages8
DOIs
StatePublished - Oct 20 2010
Event2010 IEEE International Reliability Physics Symposium, IRPS 2010 - Garden Grove, CA, Canada
Duration: May 2 2010May 6 2010

Publication series

NameIEEE International Reliability Physics Symposium Proceedings
ISSN (Print)1541-7026

Other

Other2010 IEEE International Reliability Physics Symposium, IRPS 2010
CountryCanada
CityGarden Grove, CA
Period5/2/105/6/10

Keywords

  • Guard rings
  • Latchup

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Farbiz, F., & Rosenbaum, E. (2010). Understanding transient latchup hazards and the impact of guard rings. In 2010 IEEE International Reliability Physics Symposium, IRPS 2010 (pp. 466-473). [5488787] (IEEE International Reliability Physics Symposium Proceedings). https://doi.org/10.1109/IRPS.2010.5488787