@inproceedings{136b68e6204b4e0c89d7d4ef10c3de6f,
title = "Triangle Counting and Truss Decomposition using FPGA",
abstract = "Triangle counting and truss decomposition are two essential procedures in graph analysis. As the scale of graphs grows larger, designing highly efficient graph analysis systems with less power demand becomes more and more urgent. In this paper, we present triangle counting and truss decomposition using a Field-Programmable Gate Array (FPGA). We leverage the flexibility of FPGAs and achieve low-latency high-efficiency implementations. Evaluation on SNAP dataset shows that our triangle counting and truss decomposition implementations achieve 43.5× on average (up to 757.7×) and 6.4× on average (up to 68.0×) higher performance per Watt respectively over GPU solutions.",
keywords = "FPGA, Graph algorithms, Triangle counting, Truss decomposition",
author = "Sitao Huang and Mohamed El-Hadedy and Cong Hao and Qin Li and Mailthody, {Vikram S.} and Ketan Date and Jinjun Xiong and Deming Chen and Rakesh Nagi and Hwu, {Wen Mei}",
note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 2018 IEEE High Performance Extreme Computing Conference, HPEC 2018 ; Conference date: 25-09-2018 Through 27-09-2018",
year = "2018",
month = nov,
day = "26",
doi = "10.1109/HPEC.2018.8547536",
language = "English (US)",
series = "2018 IEEE High Performance Extreme Computing Conference, HPEC 2018",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2018 IEEE High Performance Extreme Computing Conference, HPEC 2018",
address = "United States",
}