Trench isolation technology for high-performance complementary bipolar devices

Kevin C. Brown, Chris Bracken, Rashid Bashir, Kulwant Egan, Joe DeSantis, Abul E. Kabir, Wipawan Yindeepol, Joel McGregor, S. J. Prasad, Reda Razouk, Victor V. Boksha, Juan C. Rey

Research output: Chapter in Book/Report/Conference proceedingConference contribution


A trench isolation architecture for a low voltage (< 15 V), high frequency, complementary bipolar process technology has been developed. This technology features shallow and deep trench isolation with a minimum design rule of 1.0 μ, along with a zero encroachment deposited field oxide. Trench etch process results suggest a mechanism whereby, depending on the amount of exposed silicon, the plasma can either be considered `silicon deficient' or `oxygen deficient.' Black silicon formation during trench etching has been eliminated with an in-situ removal of the photoresist after the hardmask oxide has been defined. Terrain isolation process simulation results are shown to be more accurate in depicting actual wafer processing structures than Tsuprem-4. Initial bipolar device characteristics are reported that illustrate the integration of the introduced PlaTOx device isolation architecture. Realized f t/f max are 6.3/9.5 GHz for NPN, and 3.8/8.2 GHz for PNP transistors.

Original languageEnglish (US)
Title of host publicationProceedings of SPIE - The International Society for Optical Engineering
EditorsIh-Chin Chen, Nobuo Sasaki, Divyesh Patel, Girish A. Dixit
Number of pages14
StatePublished - 1996
Externally publishedYes
EventMicroelectronic Device and Multilevel Interconnection Technology II - Austin, TX, USA
Duration: Oct 16 1996Oct 17 1996


OtherMicroelectronic Device and Multilevel Interconnection Technology II
CityAustin, TX, USA

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Computer Science Applications
  • Applied Mathematics
  • Electrical and Electronic Engineering


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