Toward limits of constructing reliable memories from unreliable components

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

There has been long-standing interest in constructing reliable memory systems from unreliable components like noisy bit-cells and noisy logic gates, under circuit complexity constraints. Prior work has focused exclusively on constructive achievability results, but here we develop converse theorems for this problem for the first time. The basic technique relies on entropy production/dissipation arguments and balances the need to dissipate entropy with the redundancy of the code employed. A bound from the entropy dissipation capability of noisy logic gates is used via a sphere-packing argument. Although a large gap remains between refined achievability results stated herein and the converse, some suggestions for ways to move forward beyond this first step are provided.

Original languageEnglish (US)
Title of host publicationITW 2015 - 2015 IEEE Information Theory Workshop
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages114-118
Number of pages5
ISBN (Electronic)9781467378529
DOIs
StatePublished - Dec 17 2015
EventIEEE Information Theory Workshop, ITW 2015 - Jeju Island, Korea, Republic of
Duration: Oct 11 2015Oct 15 2015

Publication series

NameITW 2015 - 2015 IEEE Information Theory Workshop

Other

OtherIEEE Information Theory Workshop, ITW 2015
CountryKorea, Republic of
CityJeju Island
Period10/11/1510/15/15

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ASJC Scopus subject areas

  • Information Systems

Cite this

Varshney, L. R. (2015). Toward limits of constructing reliable memories from unreliable components. In ITW 2015 - 2015 IEEE Information Theory Workshop (pp. 114-118). [7360745] (ITW 2015 - 2015 IEEE Information Theory Workshop). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ITWF.2015.7360745