Topology optimization formulations for circuit board heat spreader design

In this work, we investigate the effectiveness of several problem formulations for topology optimization of electronics (printed circuit board) thermal ground planes with emphasis on overall system efficiency. Many relevant existing studies have concentrated on heat extraction problems involving a homogeneously heated design domain. This is a helpful approximation that leads to efficient solutions, but manufactured circuit boards have several discrete heat sources, often spanning a wide range of power levels. Considering these discrete heat sources and aiming to optimize electrical system performance through topology optimization of passive heat spreaders introduces new challenges not addressed currently by established methods. A variety of new problem formulations, motivated by existing power electronic system design problems, are investigated here, including non-compliance objective functions, temperature constraints and targets, and electrical system efficiency calculations. Studies presented here focus on topology optimization of passive heat spreaders, although the methodology may be extended logically to systems involving active cooling. The effectiveness of traditional topology optimization techniques to handle changes in problem structure is assessed.