Throughput-oriented kernel porting onto FPGAs

Alexandros Papakonstantinou, Deming Chen, Wen Mei Hwu, Jason Cong, Liang Yun

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Reconfigurable devices are often employed in heterogeneous systems due to their low power and parallel processing advantages. An important usability requirement is the support of a homogeneous programming interface. Nevertheless, homogeneous programming interfaces do not eliminate the need for code tweaking to enable efficient mapping of the computation across heterogeneous architectures. In this work we propose a code optimization framework which analyzes and restructures CUDA kernels that are optimized for GPU devices in order to facilitate synthesis of high-throughput custom accelerators on FPGAs. The proposed framework enables efficient performance porting without manual code tweaking or annotation by the user. A hierarchical region graph in tandem with code motions and graph coloring of array variables is employed to restructure the kernel for high throughput execution on FP- GAs.

Original languageEnglish (US)
Title of host publicationProceedings of the 50th Annual Design Automation Conference, DAC 2013
DOIs
StatePublished - Jul 12 2013
Event50th Annual Design Automation Conference, DAC 2013 - Austin, TX, United States
Duration: May 29 2013Jun 7 2013

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Other

Other50th Annual Design Automation Conference, DAC 2013
CountryUnited States
CityAustin, TX
Period5/29/136/7/13

ASJC Scopus subject areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modeling and Simulation

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