Abstract
Chip Multiprocessors (CMP) with Thread-Level Speculation (TLS) have become the subject of intense research. However, TLS is suspected of being too energy inefficient to compete against conventional processors. In this paper, we refute this claim. To do so, we first identify the main sources of dynamic energy consumption in TLS. Then, we present simple energy-saving optimizations that cut the energy cost of TLS by over 60% on average with minimal performance impact. The resulting TLS CMP, populated with four 3-issue cores, speeds-up full SPECint 2000 codes by 1.27 on average, while keeping the fraction of the chip's energy consumption due to TLS to only 20%. Compared to a 6-issue superscalar at the same frequency, the TLS CMP is on average faster, while consuming only 85% of its total on-chip power.
| Original language | English (US) |
|---|---|
| Pages | 219-228 |
| Number of pages | 10 |
| DOIs | |
| State | Published - Dec 1 2005 |
| Event | ICS05 - 19th ACM International Conference on Supercomputing - Cambridge, MA, United States Duration: Jun 20 2005 → Jun 22 2005 |
Other
| Other | ICS05 - 19th ACM International Conference on Supercomputing |
|---|---|
| Country | United States |
| City | Cambridge, MA |
| Period | 6/20/05 → 6/22/05 |
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ASJC Scopus subject areas
- Computer Science(all)
Cite this
Thread-level speculation on a CMP can be energy efficient. / Renau, Jose; Strauss, Karin; Ceze, Luis; Liu, Wei; Sarangi, Smruti; Tuck, James; Torrellas, Josep.
2005. 219-228 Paper presented at ICS05 - 19th ACM International Conference on Supercomputing, Cambridge, MA, United States.Research output: Contribution to conference › Paper
}
TY - CONF
T1 - Thread-level speculation on a CMP can be energy efficient
AU - Renau, Jose
AU - Strauss, Karin
AU - Ceze, Luis
AU - Liu, Wei
AU - Sarangi, Smruti
AU - Tuck, James
AU - Torrellas, Josep
PY - 2005/12/1
Y1 - 2005/12/1
N2 - Chip Multiprocessors (CMP) with Thread-Level Speculation (TLS) have become the subject of intense research. However, TLS is suspected of being too energy inefficient to compete against conventional processors. In this paper, we refute this claim. To do so, we first identify the main sources of dynamic energy consumption in TLS. Then, we present simple energy-saving optimizations that cut the energy cost of TLS by over 60% on average with minimal performance impact. The resulting TLS CMP, populated with four 3-issue cores, speeds-up full SPECint 2000 codes by 1.27 on average, while keeping the fraction of the chip's energy consumption due to TLS to only 20%. Compared to a 6-issue superscalar at the same frequency, the TLS CMP is on average faster, while consuming only 85% of its total on-chip power.
AB - Chip Multiprocessors (CMP) with Thread-Level Speculation (TLS) have become the subject of intense research. However, TLS is suspected of being too energy inefficient to compete against conventional processors. In this paper, we refute this claim. To do so, we first identify the main sources of dynamic energy consumption in TLS. Then, we present simple energy-saving optimizations that cut the energy cost of TLS by over 60% on average with minimal performance impact. The resulting TLS CMP, populated with four 3-issue cores, speeds-up full SPECint 2000 codes by 1.27 on average, while keeping the fraction of the chip's energy consumption due to TLS to only 20%. Compared to a 6-issue superscalar at the same frequency, the TLS CMP is on average faster, while consuming only 85% of its total on-chip power.
UR - http://www.scopus.com/inward/record.url?scp=32844469955&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=32844469955&partnerID=8YFLogxK
U2 - 10.1145/1088149.1088178
DO - 10.1145/1088149.1088178
M3 - Paper
AN - SCOPUS:32844469955
SP - 219
EP - 228
ER -