Thread-level speculation on a CMP can be energy efficient

Jose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti Sarangi, James Tuck, Josep Torrellas

Research output: Contribution to conferencePaper

Abstract

Chip Multiprocessors (CMP) with Thread-Level Speculation (TLS) have become the subject of intense research. However, TLS is suspected of being too energy inefficient to compete against conventional processors. In this paper, we refute this claim. To do so, we first identify the main sources of dynamic energy consumption in TLS. Then, we present simple energy-saving optimizations that cut the energy cost of TLS by over 60% on average with minimal performance impact. The resulting TLS CMP, populated with four 3-issue cores, speeds-up full SPECint 2000 codes by 1.27 on average, while keeping the fraction of the chip's energy consumption due to TLS to only 20%. Compared to a 6-issue superscalar at the same frequency, the TLS CMP is on average faster, while consuming only 85% of its total on-chip power.

Original languageEnglish (US)
Pages219-228
Number of pages10
DOIs
StatePublished - Dec 1 2005
EventICS05 - 19th ACM International Conference on Supercomputing - Cambridge, MA, United States
Duration: Jun 20 2005Jun 22 2005

Other

OtherICS05 - 19th ACM International Conference on Supercomputing
CountryUnited States
CityCambridge, MA
Period6/20/056/22/05

ASJC Scopus subject areas

  • Computer Science(all)

Fingerprint Dive into the research topics of 'Thread-level speculation on a CMP can be energy efficient'. Together they form a unique fingerprint.

  • Cite this

    Renau, J., Strauss, K., Ceze, L., Liu, W., Sarangi, S., Tuck, J., & Torrellas, J. (2005). Thread-level speculation on a CMP can be energy efficient. 219-228. Paper presented at ICS05 - 19th ACM International Conference on Supercomputing, Cambridge, MA, United States. https://doi.org/10.1145/1088149.1088178