Thermal via structural design in three-dimensional integrated circuits

Leslie Hwang, Kevin L. Lin, Martin D F Wong

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

3D IC, a novel packaging technology, is heavily studied to realize improved performance with denser packaging and reduced wirelength. Despite numerous advantages, thermal management is the biggest bottleneck to realize device stacking technology. In this paper, we propose a thermal-aware physical design for three-dimensional integrated circuits (3D IC). We aim to mitigate localized hotspots to ensure functionality by adding thermal fin geometry to existing thermal through silicon via (TTSV). We analyze various ways to insert thermal fin for single TTSV as well as TTSV cluster designs with the goal of maximizing heat dissipation while minimizing the interference with routing and area consumption. An analytical model of a three-dimensional system is developed and a thermal resistance circuit is built for accurate and time-efficient 3D thermal analysis.

Original languageEnglish (US)
Title of host publicationProceedings of the 13th International Symposium on Quality Electronic Design, ISQED 2012
Pages103-108
Number of pages6
DOIs
StatePublished - Jul 16 2012
Event13th International Symposium on Quality Electronic Design, ISQED 2012 - Santa Clara, CA, United States
Duration: Mar 19 2012Mar 21 2012

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Other

Other13th International Symposium on Quality Electronic Design, ISQED 2012
CountryUnited States
CitySanta Clara, CA
Period3/19/123/21/12

Keywords

  • 3D IC
  • TTSV
  • Thermal analysis
  • finite element analysis
  • thermal fin

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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  • Cite this

    Hwang, L., Lin, K. L., & Wong, M. D. F. (2012). Thermal via structural design in three-dimensional integrated circuits. In Proceedings of the 13th International Symposium on Quality Electronic Design, ISQED 2012 (pp. 103-108). [6187481] (Proceedings - International Symposium on Quality Electronic Design, ISQED). https://doi.org/10.1109/ISQED.2012.6187481