Thermal Engineering at the Limits of the CMOS Era

Krishna V. Valavala, Keith D. Coulson, Manjunath C. Rajagopal, Dhruv Gelda, Sanjiv Sinha

Research output: Chapter in Book/Report/Conference proceedingChapter

Abstract

Thermal engineering has emerged as a critical component in the development of integrated circuits and associated electronics. Considerations span multiple physical length scales, from fundamental phonon heat conduction in individual transistors at nanometer length scales to systems level cooling at centimeter scales. With a rapidly evolving technology landscape toward the end of Moore's law scaling, challenges in thermal engineering have broadened to include consideration of heat dissipation in transistors, self-heating in devices and interconnects, leakage power, the altered thermophysical properties of materials at scaled dimensions, electrothermal circuit simulations, packaging challenges for multichip and vertically stacked die packages, three-dimensional integration, systems on chip, new systems cooling technologies such as microchannel-based liquid cooling, and at the deep end of research, the thermal considerations for revolutionary logic devices. This chapter outlines key challenges in this rapidly changing landscape and summarizes the fundamentals relevant for tackling these myriad challenges. The chapter concludes by outlining thermodynamic limits for power density from a thermal standpoint.

Original languageEnglish (US)
Title of host publicationHandbook of Thin Film Deposition
Subtitle of host publicationFourth Edition
PublisherElsevier
Pages63-101
Number of pages39
ISBN (Electronic)9780128123126
ISBN (Print)9780128123119
DOIs
StatePublished - Feb 27 2018

Keywords

  • Cooling
  • Heat generation
  • Interface thermal resistance
  • Limits
  • Semiconductors
  • Thermal conductivity
  • Thermal management

ASJC Scopus subject areas

  • Engineering(all)
  • Materials Science(all)

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  • Cite this

    Valavala, K. V., Coulson, K. D., Rajagopal, M. C., Gelda, D., & Sinha, S. (2018). Thermal Engineering at the Limits of the CMOS Era. In Handbook of Thin Film Deposition: Fourth Edition (pp. 63-101). Elsevier. https://doi.org/10.1016/B978-0-12-812311-9.00004-9