The processing-in-memory paradigm: Mechanisms to enable adoption

Keyphrases

• In-memory 100%
• Logic Layer 80%
• Data Movement 60%
• Virtual Memory 60%
• Memory Channel 60%
• Processing-In-Memory Architectures 60%
• Performance Improvement 40%
• Main Memory 40%
• Technology Scaling 40%
• Cache Coherence 40%
• Limited Memory 40%
• Stacked DRAM 40%
• Significant Benefit 20%
• Memory Performance 20%
• Application Demand 20%
• Large Systems 20%
• Significant Energy 20%
• Energy Consumption Reduction 20%
• Widespread Adoption 20%
• Limited Bandwidth 20%
• Multiple Layers 20%
• Memory Mechanism 20%
• Performance Efficiency 20%
• Efficient Mechanism 20%
• Energy Efficiency 20%
• Programming Model 20%
• Bandwidth Limitation 20%
• Energy Consumption 20%
• Low Latency 20%
• Shared Memory Programming 20%
• High Latency 20%
• Logic Technology 20%
• Modern Application 20%
• Storage Layer 20%
• Memory Coherence 20%
• DRAM Memory 20%
• Pointer Chasing 20%
• Translation Lookaside Buffer 20%
• Cell Array 20%
• Memory-intensive Applications 20%
• System Energy Consumption 20%
• Address Translation 20%
• Multi-layer Architecture 20%
• DRAM Cell 20%
• System Bottleneck 20%
• Memory Abstraction 20%
• Near-data Processing 20%
• DRAM Architectures 20%
• Virtual Cache 20%
• Page Table Walkers 20%

Computer Science

• In-Memory Processing 100%
• Logic Layer 100%
• Memory Architecture 75%
• Energy Consumption 75%
• Virtual Memory 75%
• Main Memory 50%
• Cache Coherence 50%
• Energy Efficiency 25%
• Programming Model 25%
• Performance Improvement 25%
• Layer Architecture 25%
• Memory Performance 25%
• Memory Programming 25%
• Accelerator Memory 25%
• Page Table 25%
• Widespread Adoption 25%
• Application Execution 25%
• Intensive Application 25%
• Translation Lookaside Buffer 25%
• Memory Abstraction 25%
• Address Translation 25%
• Data Processing 25%
• Shared Memory 25%