TY - GEN
T1 - The compatibility analysis of thread migration and DVFS in multi-core processor
AU - Oh, Dongkeun
AU - Chen, Charlie Chung Ping
AU - Kim, Nam Sung
AU - Hu, Yu Hen
PY - 2010
Y1 - 2010
N2 - Integrating multiple cores into a processor increases the heat density significantly, which often constrains the maximum performance of such a processor. There have been many techniques using dynamic voltage and frequency scaling (DVFS) and thread migration to manipulate heat dissipation in thermally-constrained multi-core processors. However, most of them were analyzed and applied individually for optimizing the performance of the multicore processors while their computational cost for the optimization was not studied well. In this paper, we argue that a coherent organization of two techniques can maximize the performance of the multi-core processors with the least performance overheads associated with the thermal management techniques. Furthermore, we also propose an efficient method to optimize the performance of thermal-constrained multi-core processors. According to our experiment, we achieved 5% throughput improvement with negligible computation cost.
AB - Integrating multiple cores into a processor increases the heat density significantly, which often constrains the maximum performance of such a processor. There have been many techniques using dynamic voltage and frequency scaling (DVFS) and thread migration to manipulate heat dissipation in thermally-constrained multi-core processors. However, most of them were analyzed and applied individually for optimizing the performance of the multicore processors while their computational cost for the optimization was not studied well. In this paper, we argue that a coherent organization of two techniques can maximize the performance of the multi-core processors with the least performance overheads associated with the thermal management techniques. Furthermore, we also propose an efficient method to optimize the performance of thermal-constrained multi-core processors. According to our experiment, we achieved 5% throughput improvement with negligible computation cost.
KW - Dynamic voltage and frequency scaling
KW - Multi-core processor
KW - Thermal simulation
KW - Thread-migration
UR - http://www.scopus.com/inward/record.url?scp=77952654634&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77952654634&partnerID=8YFLogxK
U2 - 10.1109/ISQED.2010.5450478
DO - 10.1109/ISQED.2010.5450478
M3 - Conference contribution
AN - SCOPUS:77952654634
SN - 9781424464555
T3 - Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010
SP - 866
EP - 871
BT - Proceedings of the 11th International Symposium on Quality Electronic Design, ISQED 2010
T2 - 11th International Symposium on Quality Electronic Design, ISQED 2010
Y2 - 22 March 2010 through 24 March 2010
ER -