The Level 1 decision and data flow control subsystems of the CLEO-III trigger produce and distribute a trigger decision every 42 ns based on input from calorimetry and tracking subsystems. This paper describes the free-running pipelined trigger decision logic that correlates axial and stereo tracking information, and comb62 es time-aligned calorimetry information onto a common backplane. Programmable trigger decision boards monitor this backplane and can be configured as desired to respond to a wide variety of trigger conditions. The resulting trigger decision is regulated by a throttling mechanism that allows the data-acquisition system to modulate the trigger rate to maximize throughput without buffer overrun. A central signal distribution mechanism delivers the trigger decision and system clock to the front-end electronics.
- Field-programmable gate arrays (FPGAs)
- Trigger circuits
ASJC Scopus subject areas
- Nuclear and High Energy Physics
- Nuclear Energy and Engineering
- Electrical and Electronic Engineering