The application of compiler-assisted multiple-instruction retry to VLIW architectures

Shyh Kwei Chen; W. K. Fuchs; Wen-Mei W Hwu

doi:10.1109/FTPDS.1994.494474

The application of compiler-assisted multiple-instruction retry to VLIW architectures

Shyh Kwei Chen, W. K. Fuchs, Wen-Mei W Hwu

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Two compiler-assisted multiple-instruction word retry schemes for very long instruction word (VLIW) architectures are described. The first scheme compacts the compiler-generated hazard-free code with different degrees of rollback capability for scalar processors, and inserts no-ops in the scheduled code words. The second scheme employs a hardware read buffer to resolve frequently occurring data hazards, and utilizes the compiler to resolve the remaining hazards.

Original language	English (US)
Title of host publication	Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994
Editors	Dhiraj Pradhan, Dimiter Avresky
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	51-58
Number of pages	8
ISBN (Electronic)	0818668075, 9780818668074
DOIs	https://doi.org/10.1109/FTPDS.1994.494474
State	Published - Jan 1 1994
Event	1994 IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994 - College Station, United States Duration: Jun 12 1994 → Jun 14 1994

Publication series

Name	Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994

Conference

Conference	1994 IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994
Country	United States
City	College Station
Period	6/12/94 → 6/14/94

Fingerprint

ASJC Scopus subject areas

Computer Networks and Communications
Hardware and Architecture
Safety, Risk, Reliability and Quality

Cite this

Chen, S. K., Fuchs, W. K., & Hwu, W-M. W. (1994). The application of compiler-assisted multiple-instruction retry to VLIW architectures. In D. Pradhan, & D. Avresky (Eds.), Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994 (pp. 51-58). [494474] (Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/FTPDS.1994.494474

The application of compiler-assisted multiple-instruction retry to VLIW architectures. / Chen, Shyh Kwei; Fuchs, W. K.; Hwu, Wen-Mei W.

Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994. ed. / Dhiraj Pradhan; Dimiter Avresky. Institute of Electrical and Electronics Engineers Inc., 1994. p. 51-58 494474 (Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Chen, SK, Fuchs, WK & Hwu, W-MW 1994, The application of compiler-assisted multiple-instruction retry to VLIW architectures. in D Pradhan & D Avresky (eds), Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994., 494474, Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994, Institute of Electrical and Electronics Engineers Inc., pp. 51-58, 1994 IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994, College Station, United States, 6/12/94. https://doi.org/10.1109/FTPDS.1994.494474

Chen SK, Fuchs WK, Hwu W-MW. The application of compiler-assisted multiple-instruction retry to VLIW architectures. In Pradhan D, Avresky D, editors, Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994. Institute of Electrical and Electronics Engineers Inc. 1994. p. 51-58. 494474. (Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994). https://doi.org/10.1109/FTPDS.1994.494474

Chen, Shyh Kwei ; Fuchs, W. K. ; Hwu, Wen-Mei W. / The application of compiler-assisted multiple-instruction retry to VLIW architectures. Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994. editor / Dhiraj Pradhan ; Dimiter Avresky. Institute of Electrical and Electronics Engineers Inc., 1994. pp. 51-58 (Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994).

@inproceedings{1cef5ba4cec7411ea4166328458c7a22,

title = "The application of compiler-assisted multiple-instruction retry to VLIW architectures",

abstract = "Two compiler-assisted multiple-instruction word retry schemes for very long instruction word (VLIW) architectures are described. The first scheme compacts the compiler-generated hazard-free code with different degrees of rollback capability for scalar processors, and inserts no-ops in the scheduled code words. The second scheme employs a hardware read buffer to resolve frequently occurring data hazards, and utilizes the compiler to resolve the remaining hazards.",

author = "Chen, {Shyh Kwei} and Fuchs, {W. K.} and Hwu, {Wen-Mei W}",

year = "1994",

month = jan

day = "1",

doi = "10.1109/FTPDS.1994.494474",

language = "English (US)",

series = "Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "51--58",

editor = "Dhiraj Pradhan and Dimiter Avresky",

booktitle = "Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994",

address = "United States",

note = "1994 IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994 ; Conference date: 12-06-1994 Through 14-06-1994",

}

TY - GEN

T1 - The application of compiler-assisted multiple-instruction retry to VLIW architectures

AU - Chen, Shyh Kwei

AU - Fuchs, W. K.

AU - Hwu, Wen-Mei W

PY - 1994/1/1

Y1 - 1994/1/1

N2 - Two compiler-assisted multiple-instruction word retry schemes for very long instruction word (VLIW) architectures are described. The first scheme compacts the compiler-generated hazard-free code with different degrees of rollback capability for scalar processors, and inserts no-ops in the scheduled code words. The second scheme employs a hardware read buffer to resolve frequently occurring data hazards, and utilizes the compiler to resolve the remaining hazards.

AB - Two compiler-assisted multiple-instruction word retry schemes for very long instruction word (VLIW) architectures are described. The first scheme compacts the compiler-generated hazard-free code with different degrees of rollback capability for scalar processors, and inserts no-ops in the scheduled code words. The second scheme employs a hardware read buffer to resolve frequently occurring data hazards, and utilizes the compiler to resolve the remaining hazards.

UR - http://www.scopus.com/inward/record.url?scp=85063519702&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85063519702&partnerID=8YFLogxK

U2 - 10.1109/FTPDS.1994.494474

DO - 10.1109/FTPDS.1994.494474

M3 - Conference contribution

AN - SCOPUS:85063519702

T3 - Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994

SP - 51

EP - 58

BT - Proceedings of IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994

A2 - Pradhan, Dhiraj

A2 - Avresky, Dimiter

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 1994 IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems, FTPDS 1994

Y2 - 12 June 1994 through 14 June 1994

ER -

Access to Document

10.1109/FTPDS.1994.494474