@inproceedings{477c4c6376e54b64a7ed84c2666f70f3,
title = "Test chip design for study of CDM related failures in SoC designs",
abstract = "During CDM-ESD testing, SoC (System on a Chip) designs may fail either in the pad ring or in the core circuitry, particularly at the power domain crossings. A specially designed test chip allows one to locate the sites at which ESD-induced damage occurs and also to investigate the efficacy of different CDM protection strategies.",
keywords = "CDM, ESD, System on a chip",
author = "Nicholas Olson and Vrashank Shukla and Elyse Rosenbaum",
year = "2011",
month = jun,
day = "23",
doi = "10.1109/IRPS.2011.5784566",
language = "English (US)",
isbn = "9781424491117",
series = "IEEE International Reliability Physics Symposium Proceedings",
booktitle = "2011 International Reliability Physics Symposium, IRPS 2011",
note = "49th International Reliability Physics Symposium, IRPS 2011 ; Conference date: 10-04-2011 Through 14-04-2011",
}