Techniques for efficient software checking

Research output: Chapter in Book/Report/Conference proceedingConference contribution


Dramatic increases in the number of transistors that can be integrated on a chip make processors more susceptible to radiation-induced transient errors. For commodity chips which are cost- and energy-constrained, we need a flexible and inexpensive technology for fault detection. Software approaches can play a major role for this sector of the market because they need little hardware modifications and can be tailored to fit different requirements of reliability and performance. However, software approaches add a significant overhead. In this paper we propose two novel techniques that reduce the overhead of software error checking approaches. The first technique uses boolean logic to identify code patterns that correspond to outcome tolerant branches. We develop a compiler algorithm that finds those patterns and removes the unnecessary replicas. In the second technique we evaluate the performance benefit obtained by removing address checks before load and stores. In addition, we evaluate the overheads that can be removed when the register file is protected in hardware. Our experimental results show that the first technique improves performance by an average 7% for three of the SPEC benchmarks. The second technique can reduce overhead by up-to 50% when the most aggressive optimization is applied.

Original languageEnglish (US)
Title of host publicationLanguages and Compilers for Parallel Computing - 20th International Workshop, LCPC 2007, Revised Selected Papers
Number of pages16
StatePublished - 2008
Event20th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2007 - Urbana, IL, United States
Duration: Oct 11 2007Oct 13 2007

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume5234 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349


Other20th International Workshop on Languages and Compilers for Parallel Computing, LCPC 2007
Country/TerritoryUnited States
CityUrbana, IL

ASJC Scopus subject areas

  • Theoretical Computer Science
  • General Computer Science


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