Tangle: Route-oriented dynamic voltage minimization for variation-afflicted, energy-efficient on-chip networks

Amin Ansari, Asit Mishra, Jianping Xu, Josep Torrellas

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

On-chip networks are especially vulnerable to within-die parameter variations. Since they connect distant parts of the chip, they need to be designed to work under the most unfavorable parameter values in the chip. This results in energy-inefficient designs. To improve the energy efficiency of on-chip networks, this paper presents a novel approach that relies on monitoring the errors of messages as they traverse the network. Based on the observed errors of messages, the system dynamically decreases or increases the voltage (Vdd) of groups of network routers. With this approach, called Tangle, the different Vdd values applied to different groups of network routers progressively converge to their lowest, variation-aware, error-free values - always keeping the network frequency unchanged. This saves substantial network energy. In a simulated 64-router network with 4 V dd domains, Tangle reduces the network energy consumption by an average of 22% with negligible performance impact. In a future network design with one Vdd domain per router, Tangle lowers the network V dd by an average of 21%, reducing the network energy consumption by an average of 28% with negligible performance impact.

Original languageEnglish (US)
Title of host publication20th IEEE International Symposium on High Performance Computer Architecture, HPCA 2014
PublisherIEEE Computer Society
Pages440-451
Number of pages12
ISBN (Print)9781479930975
DOIs
StatePublished - 2014
Event20th IEEE International Symposium on High Performance Computer Architecture, HPCA 2014 - Orlando, FL, United States
Duration: Feb 15 2014Feb 19 2014

Publication series

NameProceedings - International Symposium on High-Performance Computer Architecture
ISSN (Print)1530-0897

Other

Other20th IEEE International Symposium on High Performance Computer Architecture, HPCA 2014
Country/TerritoryUnited States
CityOrlando, FL
Period2/15/142/19/14

ASJC Scopus subject areas

  • Hardware and Architecture

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