TY - GEN
T1 - System-level characterization of modal signaling for high-density off-chip interconnects
AU - Milosevic, Pavle
AU - Schutt-Aine, Jose E
PY - 2011/12/1
Y1 - 2011/12/1
N2 - In high-speed chip-to-chip single-ended signaling links, far-end crosstalk presents one of the dominant noise sources, limiting the link performance. Diagonalizing the channel using modal decomposition has been proposed to mitigate the crosstalk. However, a practical circuit implementation of such a transceiver system will unavoidably deviate from the ideal (crosstalk-free) eigenvalue decomposition. In this paper, the impact of modal encoder/decoder coefficient quantization, random common and uncorrelated noise on signal integrity is analyzed in terms of system-level performance metrics, SNR and BER. Also discussed is the optimal selection of decoder coefficients with respect to the input-referred noise at the receiver.
AB - In high-speed chip-to-chip single-ended signaling links, far-end crosstalk presents one of the dominant noise sources, limiting the link performance. Diagonalizing the channel using modal decomposition has been proposed to mitigate the crosstalk. However, a practical circuit implementation of such a transceiver system will unavoidably deviate from the ideal (crosstalk-free) eigenvalue decomposition. In this paper, the impact of modal encoder/decoder coefficient quantization, random common and uncorrelated noise on signal integrity is analyzed in terms of system-level performance metrics, SNR and BER. Also discussed is the optimal selection of decoder coefficients with respect to the input-referred noise at the receiver.
KW - Crosstalk mitigation
KW - highspeed signaling
KW - modal decomposition
UR - http://www.scopus.com/inward/record.url?scp=84864231034&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84864231034&partnerID=8YFLogxK
U2 - 10.1109/EDAPS.2011.6213748
DO - 10.1109/EDAPS.2011.6213748
M3 - Conference contribution
AN - SCOPUS:84864231034
SN - 9781467322881
T3 - 2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2011
BT - 2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2011
T2 - 2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2011
Y2 - 12 December 2011 through 14 December 2011
ER -