Symptomatic Bug Localization for Functional Debug of Hardware Designs

Debjit Pal, Shobha Vasudevan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Debugging the pre-Silicon Register Transfer Level (RTL) design is one of the most resource and time intensive processes in contemporary hardware design cycles. Given the scale and complexity of designs, bug localization is very valuable for debugging. We present an automatic bug localization technique in RTL. Our technique is based on identifying statistically relevant common symptoms across failing simulation traces through mining, and mapping these back to the corresponding execution paths in the RTL source code. Our localized code zones are small, focused, functionally coherent and executable. We achieve localization upto 5% and an average localization of 15% in the source code and upto 80% reduction in simulation trace size for a wide variety of bugs in all the important modules of a USB design.

Original languageEnglish (US)
Title of host publicationProceedings - 29th International Conference on VLSI Design, VLSID 2016 - Held concurrently with 15th International Conference on Embedded Systems
PublisherIEEE Computer Society
Pages517-522
Number of pages6
ISBN (Electronic)9781467387002
DOIs
StatePublished - Mar 16 2016
Event29th International Conference on VLSI Design, VLSID 2016 - Kolkata, India
Duration: Jan 4 2016Jan 8 2016

Publication series

NameProceedings of the IEEE International Conference on VLSI Design
Volume2016-March
ISSN (Print)1063-9667

Other

Other29th International Conference on VLSI Design, VLSID 2016
CountryIndia
CityKolkata
Period1/4/161/8/16

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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  • Cite this

    Pal, D., & Vasudevan, S. (2016). Symptomatic Bug Localization for Functional Debug of Hardware Designs. In Proceedings - 29th International Conference on VLSI Design, VLSID 2016 - Held concurrently with 15th International Conference on Embedded Systems (pp. 517-522). [7435006] (Proceedings of the IEEE International Conference on VLSI Design; Vol. 2016-March). IEEE Computer Society. https://doi.org/10.1109/VLSID.2016.14