TY - GEN
T1 - Symptomatic Bug Localization for Functional Debug of Hardware Designs
AU - Pal, Debjit
AU - Vasudevan, Shobha
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/3/16
Y1 - 2016/3/16
N2 - Debugging the pre-Silicon Register Transfer Level (RTL) design is one of the most resource and time intensive processes in contemporary hardware design cycles. Given the scale and complexity of designs, bug localization is very valuable for debugging. We present an automatic bug localization technique in RTL. Our technique is based on identifying statistically relevant common symptoms across failing simulation traces through mining, and mapping these back to the corresponding execution paths in the RTL source code. Our localized code zones are small, focused, functionally coherent and executable. We achieve localization upto 5% and an average localization of 15% in the source code and upto 80% reduction in simulation trace size for a wide variety of bugs in all the important modules of a USB design.
AB - Debugging the pre-Silicon Register Transfer Level (RTL) design is one of the most resource and time intensive processes in contemporary hardware design cycles. Given the scale and complexity of designs, bug localization is very valuable for debugging. We present an automatic bug localization technique in RTL. Our technique is based on identifying statistically relevant common symptoms across failing simulation traces through mining, and mapping these back to the corresponding execution paths in the RTL source code. Our localized code zones are small, focused, functionally coherent and executable. We achieve localization upto 5% and an average localization of 15% in the source code and upto 80% reduction in simulation trace size for a wide variety of bugs in all the important modules of a USB design.
UR - http://www.scopus.com/inward/record.url?scp=84964691168&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84964691168&partnerID=8YFLogxK
U2 - 10.1109/VLSID.2016.14
DO - 10.1109/VLSID.2016.14
M3 - Conference contribution
AN - SCOPUS:84964691168
T3 - Proceedings of the IEEE International Conference on VLSI Design
SP - 517
EP - 522
BT - Proceedings - 29th International Conference on VLSI Design, VLSID 2016 - Held concurrently with 15th International Conference on Embedded Systems
PB - IEEE Computer Society
T2 - 29th International Conference on VLSI Design, VLSID 2016
Y2 - 4 January 2016 through 8 January 2016
ER -