Switching activity minimization by efficient instruction set architecture design

Venkatraman Ramakrishna, Rakesh Kumar, Anupam Basu

Research output: Contribution to conferencePaperpeer-review

Abstract

Power consumption can be greatly minimized by reducing the bus signal transition activity (also called switching activity) in the control and data path circuit. Switching activity occurs due to the switching between two instructions (of the embedded software) on successive clock cycles. Our belief is that the binary encoding of instructions (machine code) plays a significant role in determining the amount of switching in a circuit. Thus, our aim is to realise a machine encoding of instructions of an ASIP such that for a given data path, it will minimize the average switching activity in the control path circuit of the ASIP and hence the total switching activity in the ASIP. Given the application-domain of the ASIP, we have used information theoretic techniques to arrive at an encoding of the op-code that minimizes redundancy and also the switching activity. We have compared our encoding of instruction op-codes with those obtained by other encoding techniques using a switching activity estimator designed by us.

Original languageEnglish (US)
StatePublished - Jan 1 2002
Externally publishedYes
Event2002 45th Midwest Symposium on Circuits and Systems - Tulsa, OK, United States
Duration: Aug 4 2002Aug 7 2002

Other

Other2002 45th Midwest Symposium on Circuits and Systems
CountryUnited States
CityTulsa, OK
Period8/4/028/7/02

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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