Abstract
In this paper we address the problem of designing switch modules for FPGAs and FPICs to maximize routability under area and delay constraints. The switch module design problem is closely related to two-dimensional segmentation design for FPGAs and FPICs. We study the properties of switch modules and present an algorithm for switch module design. We also present an algorithm to analyze the routability of a given switch module.
| Original language | English (US) |
|---|---|
| Title of host publication | Proc 1993 IEEE ACM Int Conf Comput Aided Des |
| Editors | Anon |
| Publisher | Publ by IEEE |
| Pages | 480-485 |
| Number of pages | 6 |
| ISBN (Print) | 0818644923 |
| State | Published - Dec 1 1993 |
| Externally published | Yes |
| Event | Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design - Santa Clara, CA, USA Duration: Nov 7 1993 → Nov 11 1993 |
Publication series
| Name | Proc 1993 IEEE ACM Int Conf Comput Aided Des |
|---|
Other
| Other | Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design |
|---|---|
| City | Santa Clara, CA, USA |
| Period | 11/7/93 → 11/11/93 |
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ASJC Scopus subject areas
- Engineering(all)
Cite this
Switch module design with application to two-dimensional segmentation design. / Zhu, Kai; Wong, D. F.; Chang, Yao Wen.
Proc 1993 IEEE ACM Int Conf Comput Aided Des. ed. / Anon. Publ by IEEE, 1993. p. 480-485 (Proc 1993 IEEE ACM Int Conf Comput Aided Des).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Switch module design with application to two-dimensional segmentation design
AU - Zhu, Kai
AU - Wong, D. F.
AU - Chang, Yao Wen
PY - 1993/12/1
Y1 - 1993/12/1
N2 - In this paper we address the problem of designing switch modules for FPGAs and FPICs to maximize routability under area and delay constraints. The switch module design problem is closely related to two-dimensional segmentation design for FPGAs and FPICs. We study the properties of switch modules and present an algorithm for switch module design. We also present an algorithm to analyze the routability of a given switch module.
AB - In this paper we address the problem of designing switch modules for FPGAs and FPICs to maximize routability under area and delay constraints. The switch module design problem is closely related to two-dimensional segmentation design for FPGAs and FPICs. We study the properties of switch modules and present an algorithm for switch module design. We also present an algorithm to analyze the routability of a given switch module.
UR - http://www.scopus.com/inward/record.url?scp=0027868459&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0027868459&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:0027868459
SN - 0818644923
T3 - Proc 1993 IEEE ACM Int Conf Comput Aided Des
SP - 480
EP - 485
BT - Proc 1993 IEEE ACM Int Conf Comput Aided Des
A2 - Anon, null
PB - Publ by IEEE
ER -