Statistical blockade: Very fast statistical simulation and modeling of rare circuit events and its application to memory design

Amith Singhee, Rob A. Rutenbar

Research output: Contribution to journalArticlepeer-review

Abstract

Circuit reliability under random parametric variation is an area of growing concern. For highly replicated circuits, e.g., static random access memories (SRAMs), a rare statistical event for one circuit may induce a not-so-rare system failure. Existing techniques perform poorly when tasked to generate both efficient sampling and sound statistics for these rare events. Statistical blockade is a novel Monte Carlo technique that allows us to efficiently filterto blockunwanted samples that are insufficiently rare in the tail distributions we seek. The method synthesizes ideas from data mining and extreme value theory and, for the challenging application of SRAM yield analysis, shows speedups of 10100 times over standard Monte Carlo.

Original languageEnglish (US)
Article number5166555
Pages (from-to)1176-1189
Number of pages14
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume28
Issue number8
DOIs
StatePublished - Aug 2009
Externally publishedYes

Keywords

  • Design automation
  • Extreme values
  • Memories
  • Monte Carlo methods
  • Simulation
  • Statistics
  • Yield estimation

ASJC Scopus subject areas

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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