STAR

Generating input vectors for design validation by Static analysis of RTL

Lingyi Lui, Shobha Vasudevan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We introduce STAR, an automatic technique For functional input vector generation for design validation. STAR statically analyzes the source code of the Register Transfer Level (RTL) design. The STAR approach is a hybrid between RTL symbolic simulation and concrete simulation, that offsets the disadvantages of both the techniques. It allows deeper as well as wider exploration of the design space by varying the extent of concrete and symbolic simulation in a given run. STAR follows a region-wide notion of coverage, where the concrete simulation navigates to a region of the design space and the symbolic simulation explores it systematically. We demonstrate that preliminary results of using STAR are promising by showing high path coverage on benchmark RTL designs.

Original languageEnglish (US)
Title of host publicationHLDVT'09 - IEEE International High Level Design Validation and Test Workshop, Conference Proceedings
Pages32-37
Number of pages6
DOIs
StatePublished - Nov 18 2009
EventHLDVT'09 - IEEE International High Level Design Validation and Test Workshop - San Francisco, CA, United States
Duration: Nov 4 2009Nov 6 2009

Publication series

NameProceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT
ISSN (Print)1552-6674

Other

OtherHLDVT'09 - IEEE International High Level Design Validation and Test Workshop
CountryUnited States
CitySan Francisco, CA
Period11/4/0911/6/09

Fingerprint

Static analysis
Static Analysis
Concretes
Simulation
Coverage
Design
Benchmark
Path
Demonstrate

ASJC Scopus subject areas

  • Software
  • Computer Science Applications
  • Theoretical Computer Science
  • Artificial Intelligence

Cite this

Lui, L., & Vasudevan, S. (2009). STAR: Generating input vectors for design validation by Static analysis of RTL. In HLDVT'09 - IEEE International High Level Design Validation and Test Workshop, Conference Proceedings (pp. 32-37). [5340179] (Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT). https://doi.org/10.1109/HLDVT.2009.5340179

STAR : Generating input vectors for design validation by Static analysis of RTL. / Lui, Lingyi; Vasudevan, Shobha.

HLDVT'09 - IEEE International High Level Design Validation and Test Workshop, Conference Proceedings. 2009. p. 32-37 5340179 (Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Lui, L & Vasudevan, S 2009, STAR: Generating input vectors for design validation by Static analysis of RTL. in HLDVT'09 - IEEE International High Level Design Validation and Test Workshop, Conference Proceedings., 5340179, Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT, pp. 32-37, HLDVT'09 - IEEE International High Level Design Validation and Test Workshop, San Francisco, CA, United States, 11/4/09. https://doi.org/10.1109/HLDVT.2009.5340179
Lui L, Vasudevan S. STAR: Generating input vectors for design validation by Static analysis of RTL. In HLDVT'09 - IEEE International High Level Design Validation and Test Workshop, Conference Proceedings. 2009. p. 32-37. 5340179. (Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT). https://doi.org/10.1109/HLDVT.2009.5340179
Lui, Lingyi ; Vasudevan, Shobha. / STAR : Generating input vectors for design validation by Static analysis of RTL. HLDVT'09 - IEEE International High Level Design Validation and Test Workshop, Conference Proceedings. 2009. pp. 32-37 (Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT).
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