TY - GEN
T1 - SSDTrain
T2 - 62nd ACM/IEEE Design Automation Conference, DAC 2025
AU - Wu, Kun
AU - Park, Jeongmin Brian
AU - Zhang, Xiaofan
AU - Hidayetoglu, Mert
AU - Mailthody, Vikram Sharma
AU - Huang, Sitao
AU - Lumetta, Steve
AU - Hwu, Wen Mei
N1 - This work was partially supported by the IBM-ILLINOIS Center for Cognitive Computing Systems Research (C3SR), by the IBMILLINOIS Discovery Accelerator Institute (IIDAI), and by NVIDIA. This work was also partly supported by credits from Google Cloud, the Illinois Computes program, and the National Energy Research Scientific Computing Center (NERSC ERCAP0031237).
PY - 2025
Y1 - 2025
N2 - The growth rate of the GPU memory capacity has not been able to keep up with that of the size of large language models (LLMs), hindering the model training process. In particular, activations-the intermediate tensors produced during forward propagation and reused in backward propagation-dominate the GPU memory use. This leads to high training overheads such as expensive weight update costs due to the small micro-batch size. To address this challenge, we propose SSDTrain, an adaptive activation offloading framework to high-capacity NVMe SSDs. SSDTrain reduces GPU memory usage without impacting performance by fully overlapping data transfers with computation. SSDTrain is compatible with popular deep learning frameworks like PyTorch, Megatron, and DeepSpeed, and it employs techniques such as tensor deduplication and forwarding to further enhance efficiency. We extensively experimented with popular LLMs like GPT, BERT, and T5. Results demonstrate that SSDTrain reduces 47% of the activation peak memory usage. At the same time, SSDTrain perfectly overlaps the I/O with the computation and incurs negligible overhead. Compared with keeping activations in GPU memory and layerwise full recomputation, SSDTrain achieves the best memory savings with negligible throughput loss. We further analyze how the reduced activation memory use may be leveraged to increase throughput by increasing micro-batch size and reducing pipeline parallelism bubbles.
AB - The growth rate of the GPU memory capacity has not been able to keep up with that of the size of large language models (LLMs), hindering the model training process. In particular, activations-the intermediate tensors produced during forward propagation and reused in backward propagation-dominate the GPU memory use. This leads to high training overheads such as expensive weight update costs due to the small micro-batch size. To address this challenge, we propose SSDTrain, an adaptive activation offloading framework to high-capacity NVMe SSDs. SSDTrain reduces GPU memory usage without impacting performance by fully overlapping data transfers with computation. SSDTrain is compatible with popular deep learning frameworks like PyTorch, Megatron, and DeepSpeed, and it employs techniques such as tensor deduplication and forwarding to further enhance efficiency. We extensively experimented with popular LLMs like GPT, BERT, and T5. Results demonstrate that SSDTrain reduces 47% of the activation peak memory usage. At the same time, SSDTrain perfectly overlaps the I/O with the computation and incurs negligible overhead. Compared with keeping activations in GPU memory and layerwise full recomputation, SSDTrain achieves the best memory savings with negligible throughput loss. We further analyze how the reduced activation memory use may be leveraged to increase throughput by increasing micro-batch size and reducing pipeline parallelism bubbles.
UR - https://www.scopus.com/pages/publications/105017544890
UR - https://www.scopus.com/pages/publications/105017544890#tab=citedBy
U2 - 10.1109/DAC63849.2025.11132754
DO - 10.1109/DAC63849.2025.11132754
M3 - Conference contribution
AN - SCOPUS:105017544890
T3 - Proceedings - Design Automation Conference
BT - 2025 62nd ACM/IEEE Design Automation Conference, DAC 2025
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 22 June 2025 through 25 June 2025
ER -