TY - GEN
T1 - Software transactional memory for large scale clusters
AU - Bocchino, Robert L.
AU - Adve, Vikram S.
AU - Chamberlain, Bradford L.
PY - 2008
Y1 - 2008
N2 - While there has been extensive work on the design of software transactional memory (STM) for cache coherent shared memory systems, there has been no work on the design of an STM system for very large scale platforms containing potentially thousands of nodes. In this work, we present Cluster-STM, an STM designed for high performance on large-scale commodity clusters. Our design addresses several novel issues posed by this domain, including aggregating communication, managing locality, and distributing transactional metadata onto the nodes. We also re-evaluate several STM design choices previously studied for cache-coherent machines and conclude that, in some cases, different choices are appropriate on clusters. Finally, we show that our design scales well up to 512 processors. This is because on a cluster, the main barrier to STM scalability is the remote communication overhead imposed by the STM operations, and our design aggregates most of that communication with the communication of the underlying data.
AB - While there has been extensive work on the design of software transactional memory (STM) for cache coherent shared memory systems, there has been no work on the design of an STM system for very large scale platforms containing potentially thousands of nodes. In this work, we present Cluster-STM, an STM designed for high performance on large-scale commodity clusters. Our design addresses several novel issues posed by this domain, including aggregating communication, managing locality, and distributing transactional metadata onto the nodes. We also re-evaluate several STM design choices previously studied for cache-coherent machines and conclude that, in some cases, different choices are appropriate on clusters. Finally, we show that our design scales well up to 512 processors. This is because on a cluster, the main barrier to STM scalability is the remote communication overhead imposed by the STM operations, and our design aggregates most of that communication with the communication of the underlying data.
KW - Clusters
KW - Distributed memory architectures
KW - Scalability
KW - Software transactional memory (STM)
UR - http://www.scopus.com/inward/record.url?scp=70350075608&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=70350075608&partnerID=8YFLogxK
U2 - 10.1145/1345206.1345242
DO - 10.1145/1345206.1345242
M3 - Conference contribution
AN - SCOPUS:70350075608
SN - 9781595939609
T3 - Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP
SP - 247
EP - 257
BT - PPoPP'08 - Proceedings of the 2008 ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
PB - Association for Computing Machinery
ER -