SoC, NoC and hierarchical bus implementations of applications on FPGAS using the FCUDA flow

Tan Nguyen; Yao Cheny; Kyle Rupnow; Swathi Gurumani; Deming Chen

doi:10.1109/ISVLSI.2016.131

SoC, NoC and hierarchical bus implementations of applications on FPGAS using the FCUDA flow

Tan Nguyen, Yao Cheny, Kyle Rupnow, Swathi Gurumani, Deming Chen

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

The FCUDA project aims to improve programmability of FPGAS and expression of application parallelism in High Level Synthesis (HLS) through the use of the CUDA language. The CUDA language is a popular single-instruction multiple data (SIMD) style programming language with wide adoption, thus offering significant opportunity to bring experienced programmers to FPGA computing. The FCUDA project now has open-sourced the core CUDA to RTL transformation as well as the infrastructure for design space exploration, bus-based andNoC-based on-chip communications, and platform integration with Xilinx's SoC systems. In this paper, we present FCUDA's design space exploration, interconnect and platform integration to present guidelines for selecting system-level infrastructure for an application for the best implementation.

Original language	English (US)
Title of host publication	Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016
Publisher	IEEE Computer Society
Pages	661-666
Number of pages	6
ISBN (Electronic)	9781467390385
DOIs	https://doi.org/10.1109/ISVLSI.2016.131
State	Published - Sep 2 2016
Event	15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016 - Pittsburgh, United States Duration: Jul 11 2016 → Jul 13 2016

Publication series

Name	Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Volume	2016-September
ISSN (Print)	2159-3469
ISSN (Electronic)	2159-3477

Other

Other	15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016
Country/Territory	United States
City	Pittsburgh
Period	7/11/16 → 7/13/16

ASJC Scopus subject areas

Hardware and Architecture
Control and Systems Engineering
Electrical and Electronic Engineering

Online availability

10.1109/ISVLSI.2016.131

Library availability

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Nguyen, T., Cheny, Y., Rupnow, K., Gurumani, S., & Chen, D. (2016). SoC, NoC and hierarchical bus implementations of applications on FPGAS using the FCUDA flow. In Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016 (pp. 661-666). Article 7560276 (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; Vol. 2016-September). IEEE Computer Society. https://doi.org/10.1109/ISVLSI.2016.131

SoC, NoC and hierarchical bus implementations of applications on FPGAS using the FCUDA flow. / Nguyen, Tan; Cheny, Yao; Rupnow, Kyle et al.
Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016. IEEE Computer Society, 2016. p. 661-666 7560276 (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; Vol. 2016-September).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Nguyen, T, Cheny, Y, Rupnow, K, Gurumani, S & Chen, D 2016, SoC, NoC and hierarchical bus implementations of applications on FPGAS using the FCUDA flow. in Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016., 7560276, Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, vol. 2016-September, IEEE Computer Society, pp. 661-666, 15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, United States, 7/11/16. https://doi.org/10.1109/ISVLSI.2016.131

Nguyen T, Cheny Y, Rupnow K, Gurumani S, Chen D. SoC, NoC and hierarchical bus implementations of applications on FPGAS using the FCUDA flow. In Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016. IEEE Computer Society. 2016. p. 661-666. 7560276. (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI). doi: 10.1109/ISVLSI.2016.131

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SoC, NoC and hierarchical bus implementations of applications on FPGAS using the FCUDA flow

Abstract

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