TY - JOUR
T1 - SMART
T2 - A Secure Magnetoelectric AntifeRromagnet-Based Tamper-Proof Non-Volatile Memory
AU - Rangarajan, Nikhil
AU - Patnaik, Satwik
AU - Knechtel, Johann
AU - Sinanoglu, Ozgur
AU - Rakheja, Shaloo
N1 - Funding Information:
Corresponding authors: Nikhil Rangarajan (nikhil.rangarajan@nyu.edu), Satwik Patnaik (sp4012@nyu.edu), and Shaloo Rakheja (rakheja@illinois.edu) This work was supported in part by the Semiconductor Research Corporation (SRC) and the National Science Foundation (NSF) through the grant ECCS 1740136. The work of Satwik Patnaik was supported by the Global Ph.D. Fellowship at NYU/NYU AD.
Publisher Copyright:
© 2013 IEEE.
PY - 2020
Y1 - 2020
N2 - The storage industry is moving toward emerging non-volatile memories (NVMs), including the spin-transfer torque magnetoresistive random-access memory (STT-MRAM) and the phase-change memory (PCM), owing to their high density and low-power operation. In this paper, we demonstrate, for the first time, circuit models and performance benchmarking for the domain wall (DW) reversal-based magnetoelectric-antiferromagnetic random access memory (ME-AFMRAM) at cell-level and at array-level. We also provide perspectives for coherent rotation-based memory switching with topological insulator-driven anomalous Hall read-out. In the coherent rotation regime, the ultra-low power magnetoelectric switching coupled with the terahertz-range antiferromagnetic dynamics result in substantially lower energy-per-bit and latency metrics for the ME-AFM RAM compared to other NVMs including STT-MRAM and PCM. After characterizing the novel ME-AFM RAM, we leverage its unique properties to build a dense, on-chip, secure NVM platform, called SMART: A Secure Magnetoelectric Antiferromagnet-Based Tamper-Proof Non-Volatile Memory. New NVM technologies open up challenges and opportunities from a data-security perspective. For example, their sensitivity to magnetic fields and temperature fluctuations, and their data remanence after power-down make NVMs vulnerable to data theft and tampering attacks. The proposed SMART memory is not only resilient against data confidentiality attacks seeking to leak sensitive information but also ensures data integrity and prevents Denial-of-Service (DoS) attacks on the memory. It is impervious to particular power side-channel (PSC) attacks that exploit asymmetric read/write signatures for '0' and '1' logic levels, and photonic side-channel attacks that monitor photo-emission signatures from the chip backside.
AB - The storage industry is moving toward emerging non-volatile memories (NVMs), including the spin-transfer torque magnetoresistive random-access memory (STT-MRAM) and the phase-change memory (PCM), owing to their high density and low-power operation. In this paper, we demonstrate, for the first time, circuit models and performance benchmarking for the domain wall (DW) reversal-based magnetoelectric-antiferromagnetic random access memory (ME-AFMRAM) at cell-level and at array-level. We also provide perspectives for coherent rotation-based memory switching with topological insulator-driven anomalous Hall read-out. In the coherent rotation regime, the ultra-low power magnetoelectric switching coupled with the terahertz-range antiferromagnetic dynamics result in substantially lower energy-per-bit and latency metrics for the ME-AFM RAM compared to other NVMs including STT-MRAM and PCM. After characterizing the novel ME-AFM RAM, we leverage its unique properties to build a dense, on-chip, secure NVM platform, called SMART: A Secure Magnetoelectric Antiferromagnet-Based Tamper-Proof Non-Volatile Memory. New NVM technologies open up challenges and opportunities from a data-security perspective. For example, their sensitivity to magnetic fields and temperature fluctuations, and their data remanence after power-down make NVMs vulnerable to data theft and tampering attacks. The proposed SMART memory is not only resilient against data confidentiality attacks seeking to leak sensitive information but also ensures data integrity and prevents Denial-of-Service (DoS) attacks on the memory. It is impervious to particular power side-channel (PSC) attacks that exploit asymmetric read/write signatures for '0' and '1' logic levels, and photonic side-channel attacks that monitor photo-emission signatures from the chip backside.
KW - Antiferromagnetic materials
KW - magnetic memory
KW - magnetoelectric effects
KW - non-volatile memory
KW - tamper-proof memory
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U2 - 10.1109/ACCESS.2020.2988889
DO - 10.1109/ACCESS.2020.2988889
M3 - Article
AN - SCOPUS:85084471540
SN - 2169-3536
VL - 8
SP - 76130
EP - 76142
JO - IEEE Access
JF - IEEE Access
M1 - 9072373
ER -