Simulation of transients in VLSI packaging interconnections

O. A. Palusinski, J. C. Liao, J. L. Prince, A. C. Cangellaris

Research output: Contribution to journalConference articlepeer-review


An approach to electrical analysis of VLSI packaging interconnections using computer simulation is discussed. Corresponding simulation software developed during the course of research on VLSI interconnections is described. Examples of application to prototypical interconnections (two-transmission-line systems joined by a lumped-parameter network and a transmission line terminated by a network of bipolar and MOS transistors) are provided. Simulation results for the above examples are presented and analyzed. The current status of work is discussed, and directions of future research are delineated.

Original languageEnglish (US)
Pages (from-to)404-409
Number of pages6
JournalProceedings - Electronic Components and Technology Conference
StatePublished - 1989
Externally publishedYes
Event39th Electronic Components - Houston, TX, USA
Duration: May 22 1989May 24 1989

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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