Simulation of Transients in VLSI Packaging Interconnections

Olgierd A. Palusinski, J. C. Liao, John L. Prince, Andreas C. Cangellaris

Research output: Contribution to journalArticlepeer-review


An approach to electrical analysis of VLSI packaging interconnections via computer simulation is presented. Corresponding simulation software developed during the course of research on VLSI interconnections conducted at the University of Arizona is also described. Examples of application to prototypical interconnections (two transmission line systems joined by a lumped parameter network and a transmission line terminated by a network of bipolar and MOS transistors) are provided. The results of simulation of the above examples are presented and analyzed. Discussion of current status of work is also included and directions of future research delineated.

Original languageEnglish (US)
Pages (from-to)160-166
Number of pages7
JournalIEEE Transactions on Components, Hybrids, and Manufacturing Technology
Issue number1
StatePublished - Mar 1990
Externally publishedYes

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Engineering(all)
  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering


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