Simulating PCI-Express Interconnect for Future System Exploration

Mohammad Alian, Krishna Parasuram Srinivasan, Nam Sung Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The PCI-Express interconnect is the dominant interconnection technology within a single computer node that is used for connecting off-chip devices such as network interface cards (NICs) and GPUs to the processor chip. The PCI-Express bandwidth and latency are often the bottleneck in the processor, memory and device interactions and impacts the overall performance of the connected devices. Architecture simulators often focus on modeling the performance of processor and memory and lack a performance model for the I/O devices and interconnections. In this work, we implement a flexible and detailed model for the PCI-Express interconnect in a widely known architecture simulator. We also implement a PCI-Express device model that is configured by a PCI-Express device driver. We validate our PCI-Express interconnect performance against a physical Gen 2 PCI-Express link. Our evaluation results show that the PCI-Express model bandwidth is within 19.0% of the physical setup. We use our model to evaluate different PCI-Express link widths and latency and show its impact on the overall I/O performance of an I/O intensive application.

Original languageEnglish (US)
Title of host publication2018 IEEE International Symposium on Workload Characterization, IISWC 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages168-178
Number of pages11
ISBN (Electronic)9781538667804
DOIs
StatePublished - Dec 11 2018
Event2018 IEEE International Symposium on Workload Characterization, IISWC 2018 - Raleigh, United States
Duration: Sep 30 2018Oct 2 2018

Publication series

Name2018 IEEE International Symposium on Workload Characterization, IISWC 2018

Other

Other2018 IEEE International Symposium on Workload Characterization, IISWC 2018
CountryUnited States
CityRaleigh
Period9/30/1810/2/18

ASJC Scopus subject areas

  • Artificial Intelligence
  • Hardware and Architecture
  • Software
  • Information Systems and Management

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  • Cite this

    Alian, M., Srinivasan, K. P., & Kim, N. S. (2018). Simulating PCI-Express Interconnect for Future System Exploration. In 2018 IEEE International Symposium on Workload Characterization, IISWC 2018 (pp. 168-178). [8573496] (2018 IEEE International Symposium on Workload Characterization, IISWC 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IISWC.2018.8573496