Simulated Fault Injection: A Methodology to Evaluate Fault Tolerant Microprocessor Architectures

Keyphrases

• Controller Failure 50%
• Dual Configuration 50%
• Dual-channel 50%
• Engine Controller 50%
• Fault Impact 50%
• Fault-tolerant 100%
• Fault-tolerant Architecture 50%
• Jet Engine 50%
• Logic Analysis 50%
• Microprocessor Architecture 100%
• Mixed-mode Simulation 50%
• Multiple Event Transient 100%
• Redundancy 50%
• Simulated Fault Injection 100%
• Simulation-based Fault Injection 50%
• Transient Error 50%

Engineering

• Impact Fault 25%
• Jet Engine 25%
• Microprocessor 100%
• Mixed Mode 25%
• Transients 100%

Computer Science

• Engine Controller 33%
• Fault Injection 100%
• Fault Tolerant 100%
• Mixed-Mode Simulation 33%