The continued scaling of power performance in electronic hardware for high-performance computing is rapidly being limited due to the large power consumption and restricted throughput of traditional electrical interconnects. One possible solution is to replace conventional global interconnects with a CMOS compatible intra-chip optical network, based on Silicon-On-Insulator (SOI) photonic integrated circuits. While the bandwidth and power consumption advantages of SOI optical interconnects are potentially immense, ensuring the performance of chip-scale networks places stringent requirements upon the control of the manufacturing process, and its influence upon the operation of individual optical components. I will present recent work on the design, fabrication, and demonstration of various passive and electrooptic devices required for high speed optical interconnect applications, including high-order optical filters and modulators. Various aspects of the CMOS compatible fabrication process used at IBM Research for manufacturing SOI photonic wire circuits will be discussed, including waveguide loss, surface roughness, device dimensions, and microresonator frequency uniformity.