@inproceedings{f748dd2d0d7f47a5a283617b7a883b2c,
title = "Signal and Power Integrity Design and Analysis for Bunch-of-Wires (BoW) Interface for Chiplet Integration on Advanced Packaging",
abstract = "This work advances the current understanding and performance assessment of chiplet interfaces by providing a framework for modeling and joint simulation of signal and power integrity of BoW-based die-to-die interconnects with advanced packaging technology. The study covers data rates up to 16 Gbps. This paper presents a circuit-level implementation of the BoW slice that consists of a driver on one chiplet and a receiver on another chiplet. This work compares the performance of various combinations of high-density transmission lines with different line-and-space and wirelengths. It presents configurations of the BoW data lines that have extremely low power dissipation, less than 0.2 pJ/bit at 8 and 16 Gbps.",
keywords = "Bunch-of- Wires, Power integrity, Signal integrity, chiplet, interconnects",
author = "Ram Krishna and Watanabe, {Atom O.} and Golz, {John W.} and Ravi Bonam and Libsch, {Frank R.} and Elyse Rosenbaum and Arvind Kumar",
note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 73rd IEEE Electronic Components and Technology Conference, ECTC 2023 ; Conference date: 30-05-2023 Through 02-06-2023",
year = "2023",
doi = "10.1109/ECTC51909.2023.00171",
language = "English (US)",
series = "Proceedings - Electronic Components and Technology Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "1004--1011",
booktitle = "Proceedings - IEEE 73rd Electronic Components and Technology Conference, ECTC 2023",
address = "United States",
}