TY - GEN
T1 - Short-channel enhancement-mode planar GaAs nanowire HEMTs through a bottom-up method
AU - Xin, Miao
AU - Chen, Zhang
AU - Li, Xiuling
PY - 2012
Y1 - 2012
N2 - Bottom-up self-assembled planar nanowires (NWs) are of great interest for device application because they can be readily integrated using conventional processing technique. Planar GaAs NWs have been demonstrated to have great crystal quality (free from top-down dry etching damages) and high electron mobility. Considering NWs' 3D geometry, planar NW-FETs inherently benefit from the enhanced electron confinement and electrostatic gate control which are essential to suppress short channel effects and enable the down-scaling of modern transistors. We had fabricated multiple channel planar NW high electron mobility transistors (NW-HEMTs) with self-aligned intrinsic planar <60;110> GaAs NWs capped with Si doped Al xGa 1-xAs thin film as the channel on semi-insulating (100) GaAs substrates and demonstrated the feasibility of wafer-scale electrical uniformity of bottom-up NW-FETs previously [1-4]. However, these prototype multiple channel planar NW-HEMTs were of 1.2μm gate length and ∼250nm NW diameter in the channel.
AB - Bottom-up self-assembled planar nanowires (NWs) are of great interest for device application because they can be readily integrated using conventional processing technique. Planar GaAs NWs have been demonstrated to have great crystal quality (free from top-down dry etching damages) and high electron mobility. Considering NWs' 3D geometry, planar NW-FETs inherently benefit from the enhanced electron confinement and electrostatic gate control which are essential to suppress short channel effects and enable the down-scaling of modern transistors. We had fabricated multiple channel planar NW high electron mobility transistors (NW-HEMTs) with self-aligned intrinsic planar <60;110> GaAs NWs capped with Si doped Al xGa 1-xAs thin film as the channel on semi-insulating (100) GaAs substrates and demonstrated the feasibility of wafer-scale electrical uniformity of bottom-up NW-FETs previously [1-4]. However, these prototype multiple channel planar NW-HEMTs were of 1.2μm gate length and ∼250nm NW diameter in the channel.
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U2 - 10.1109/DRC.2012.6256981
DO - 10.1109/DRC.2012.6256981
M3 - Conference contribution
AN - SCOPUS:84866927895
SN - 9781467311618
T3 - Device Research Conference - Conference Digest, DRC
SP - 119
EP - 120
BT - 70th Device Research Conference, DRC 2012 - Conference Digest
T2 - 70th Device Research Conference, DRC 2012
Y2 - 18 June 2012 through 20 June 2012
ER -