Sentinel Scheduling for VLIW and Superscalar Processors

Scott A. Mahlke, William Y. Chen, Wen Mei W. Hwu, B. Ramakrishna Rau, Michael S. Schlansker

Research output: Contribution to journalArticle

Abstract

Speculative execution is an important source of parallelism for VLIW and superscalar processors. A serious challenge with compiler-controlled speculative execution is to accurately detect and report all program execution errors at the time of occurrence. In this paper, a set of architectural features and compile-time scheduling support referred to as sentinel scheduling is introduced. Sentinel scheduling provides an effective framework for compiler-controlled speculative execution that accurately detects and reports all exceptions. Sentinel scheduling also supports speculative execution of store instructions by providing a store buffer which allows probationary entries. Experimental results show that sentinel scheduling is highly effective for a wide range of VLIW and superscalar processors.

Original languageEnglish (US)
Pages (from-to)238-247
Number of pages10
JournalACM SIGPLAN Notices
Volume27
Issue number9
DOIs
StatePublished - Jan 9 1992

ASJC Scopus subject areas

  • Software
  • Computer Graphics and Computer-Aided Design

Fingerprint Dive into the research topics of 'Sentinel Scheduling for VLIW and Superscalar Processors'. Together they form a unique fingerprint.

  • Cite this

    Mahlke, S. A., Chen, W. Y., Hwu, W. M. W., Rau, B. R., & Schlansker, M. S. (1992). Sentinel Scheduling for VLIW and Superscalar Processors. ACM SIGPLAN Notices, 27(9), 238-247. https://doi.org/10.1145/143371.143529