Abstract
An embodiment may involve determining that a first logical partition of a scratchpad memory coupled to a processor core is empty and a first application is scheduled to execute; instructing a direct memory access (DMA) engine to load the first application into the first logical partition and then instructing the processor core to execute the first application from the first logical partition; while the first application is being executed from the first logical partition, determining that a second logical partition of the scratchpad memory is empty and a second application is scheduled to execute; instructing the DMA engine to load the second application into the second logical partition; determining that execution of the first application has completed; and instructing the DMA engine to unload the first application from the first logical partition and instructing the processor core to execute the second application from the second logical partition.
Original language | English (US) |
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U.S. patent number | 10649914 |
Filing date | 6/30/17 |
State | Published - May 12 2020 |