Runtime Techniques for Programming with Fast and Slow Memory

Xiang Ni, Nikhil Jain, Kavitha Chandrasekar, Laxmikant V Kale

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The increase in memory capacity is substantially behind the increase in computing power in today's supercomputers. In order to alleviate the effect of this gap, diverse options such as NVM-non-volatile memory (less expensive but slow) and HBM-high bandwidth memory (fast but expensive) are being explored. In this paper, we present a common approach using parallel runtime techniques for utilizing NVM and HBM as extensions of the existing memory hierarchy. We evaluate our approach using matrix-matrix multiplication kernel implemented in CHARM++ and show that applications with memory requirement four times the HBM/DRAM capacity can be executed efficiently using significantly less total resources.

Original languageEnglish (US)
Title of host publicationProceedings - 2017 IEEE International Conference on Cluster Computing, CLUSTER 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages147-151
Number of pages5
ISBN (Electronic)9781538623268
DOIs
StatePublished - Sep 22 2017
Event2017 IEEE International Conference on Cluster Computing, CLUSTER 2017 - Honolulu, United States
Duration: Sep 5 2017Sep 8 2017

Publication series

NameProceedings - IEEE International Conference on Cluster Computing, ICCC
Volume2017-September
ISSN (Print)1552-5244

Other

Other2017 IEEE International Conference on Cluster Computing, CLUSTER 2017
CountryUnited States
CityHonolulu
Period9/5/179/8/17

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Signal Processing

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    Ni, X., Jain, N., Chandrasekar, K., & Kale, L. V. (2017). Runtime Techniques for Programming with Fast and Slow Memory. In Proceedings - 2017 IEEE International Conference on Cluster Computing, CLUSTER 2017 (pp. 147-151). [8048926] (Proceedings - IEEE International Conference on Cluster Computing, ICCC; Vol. 2017-September). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CLUSTER.2017.94