Abstract
Cache effectiveness should be improved to deal with long memory latencies, to utilize run-time adaptive cache management techniques, to optimize both performance and cost of implementation, and to increase data cache effectiveness for integer programs. A microarchitecture scheme where the hardware determines the data placement is presented based on dynamic referencing behavior. This scheme is fully compatible with instruction set architectures. Run-time adaptive cache management can significantly improve the overall performance of integer applications. The improvements are due to increased cache miss handling latencies.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 774-775 |
| Number of pages | 2 |
| Journal | Proceedings of the Hawaii International Conference on System Sciences |
| Volume | 7 |
| State | Published - 1998 |
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ASJC Scopus subject areas
- Software
- Industrial and Manufacturing Engineering
Cite this
Run-time adaptive cache management. / Johnson, Teresa L.; Connors, Daniel A.; Hwu, Wen-Mei W.
In: Proceedings of the Hawaii International Conference on System Sciences, Vol. 7, 1998, p. 774-775.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Run-time adaptive cache management
AU - Johnson, Teresa L.
AU - Connors, Daniel A.
AU - Hwu, Wen-Mei W
PY - 1998
Y1 - 1998
N2 - Cache effectiveness should be improved to deal with long memory latencies, to utilize run-time adaptive cache management techniques, to optimize both performance and cost of implementation, and to increase data cache effectiveness for integer programs. A microarchitecture scheme where the hardware determines the data placement is presented based on dynamic referencing behavior. This scheme is fully compatible with instruction set architectures. Run-time adaptive cache management can significantly improve the overall performance of integer applications. The improvements are due to increased cache miss handling latencies.
AB - Cache effectiveness should be improved to deal with long memory latencies, to utilize run-time adaptive cache management techniques, to optimize both performance and cost of implementation, and to increase data cache effectiveness for integer programs. A microarchitecture scheme where the hardware determines the data placement is presented based on dynamic referencing behavior. This scheme is fully compatible with instruction set architectures. Run-time adaptive cache management can significantly improve the overall performance of integer applications. The improvements are due to increased cache miss handling latencies.
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UR - http://www.scopus.com/inward/citedby.url?scp=0031607077&partnerID=8YFLogxK
M3 - Article
AN - SCOPUS:0031607077
VL - 7
SP - 774
EP - 775
JO - Proceedings of the Hawaii International Conference on System Sciences
JF - Proceedings of the Hawaii International Conference on System Sciences
SN - 1060-3425
ER -