Robust and energy-efficient DSP systems via output probability processing

Rami A. Abdallah, Naresh R Shanbhag

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper proposes to employ error statistics of nanoscale circuit fabrics to design robust energy-efficient digital signal processing (DSP) systems. Architectural level error statistics are exploited to generate probability or the reliability of each output bit of a DSP kernel. The proposed technique is referred to here as bit-level a posteriori probability processing (BLAPP). Energy efficiency and robustness of a 2D discrete cosine transform (2D-DCT) image codec employing BLAPP is studied. Simulations in a commercial 45nm CMOS process show that BLAPP provides up to 14X improvement in robustness, and 25% power savings over conventional 2D-DCT codec design.

Original languageEnglish (US)
Title of host publication2010 IEEE International Conference on Computer Design, ICCD 2010
Pages38-44
Number of pages7
DOIs
StatePublished - Dec 1 2010
Event28th IEEE International Conference on Computer Design, ICCD 2010 - Amsterdam, Netherlands
Duration: Oct 3 2010Oct 6 2010

Publication series

NameProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
ISSN (Print)1063-6404

Other

Other28th IEEE International Conference on Computer Design, ICCD 2010
CountryNetherlands
CityAmsterdam
Period10/3/1010/6/10

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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  • Cite this

    Abdallah, R. A., & Shanbhag, N. R. (2010). Robust and energy-efficient DSP systems via output probability processing. In 2010 IEEE International Conference on Computer Design, ICCD 2010 (pp. 38-44). [5647569] (Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors). https://doi.org/10.1109/ICCD.2010.5647569