Rigorous Electromagnetic Modeling of Chip-to-Package (First-Level) Interconnections

Yuh Sheng Tsuei; Andreas C. Cangellaris; John L. Prince

doi:10.1109/33.273688

Rigorous Electromagnetic Modeling of Chip-to-Package (First-Level) Interconnections

Yuh Sheng Tsuei, Andreas C. Cangellaris, John L. Prince

Research output: Contribution to journal › Article › peer-review

Abstract

A methodology is presented for the rigorous electromagnetic analysis of pulse transmission through first-level interconnects. The methodology combines a full-wave, vectorial, time-dependent Maxwell's equations solver with SPICE circuit models for the nonlinear drivers, to facilitate the accurate modeling of the electromagnetic phenomena occurring at the chip-to-package interface. Comparisons of the results obtained using this method with others calculated using SPICE simulations are used to validate the method and demonstrate its application in the electromagnetic modeling of high-speed packaging structures.

Original language	English (US)
Pages (from-to)	876-883
Number of pages	8
Journal	IEEE Transactions on Components, Hybrids, and Manufacturing Technology
Volume	16
Issue number	8
DOIs	https://doi.org/10.1109/33.273688
State	Published - Dec 1993
Externally published	Yes

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
General Engineering
Industrial and Manufacturing Engineering
Electrical and Electronic Engineering

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10.1109/33.273688

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title = "Rigorous Electromagnetic Modeling of Chip-to-Package (First-Level) Interconnections",

abstract = "A methodology is presented for the rigorous electromagnetic analysis of pulse transmission through first-level interconnects. The methodology combines a full-wave, vectorial, time-dependent Maxwell's equations solver with SPICE circuit models for the nonlinear drivers, to facilitate the accurate modeling of the electromagnetic phenomena occurring at the chip-to-package interface. Comparisons of the results obtained using this method with others calculated using SPICE simulations are used to validate the method and demonstrate its application in the electromagnetic modeling of high-speed packaging structures.",

author = "Tsuei, {Yuh Sheng} and Cangellaris, {Andreas C.} and Prince, {John L.}",

note = "Funding Information: Manuscript received March 1, 1993; revised July 31, 1993. This paper was presented at the 1993 Electronics Components and Technology Conference, Orlando, F1, June 14, 1993. This work was supported in part by the Semiconductor Research Corporation under Contract 92-MP-086. The authors are with the Center for Electronic Packaging Research, Department of Electrical and Computer Engineering, University of Arizona, Tucson, AZ 85721. IEEE Log Number 9213236.",

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AU - Prince, John L.

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Rigorous Electromagnetic Modeling of Chip-to-Package (First-Level) Interconnections

Abstract

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