Rigel: An architecture and scalable programming interface for a 1000-core accelerator

Keyphrases

• Programming Interface 100%
• Specialized Hardware 66%
• Hardware Support 66%
• Low-level Programming 66%
• GFLOPS 33%
• Scalability Issues 33%
• Initial Design 33%
• Data Parallelism 33%
• Load Balancing 33%
• Software Development Methodology 33%
• Parallel Computing 33%
• Design Analysis 33%
• Power Efficiency 33%
• Work Distribution 33%
• Programming Model 33%
• Single Precision 33%
• Execution Model 33%
• Application-specific Hardware 33%
• Space Model 33%
• Accelerator Architectures 33%
• Task Allocation 33%
• Parallel Work 33%
• Global Address Space 33%
• Task Parallelism 33%
• Flexible Hardware 33%
• Minimal Hardware 33%
• Programmable Accelerator 33%
• Single Program multiple Data 33%

Computer Science

• Hardware Support 100%
• Software Technique 50%
• Parallel Computation 50%
• Load Balancing 50%
• Programming Model 50%
• Single Precision 50%
• Data Execution 50%
• Execution Model 50%
• Power Efficiency 50%
• Global Address Space 50%
• Single Program 50%
• Dynamically Scheduled 50%
• Barrier Operation 50%